I am a senior digital design engineer,
I have a wide knowledge of digital design in ASIC and FPGA using both VHDL and Verilog.
I am using Vivado, ISE and Quartise.
I have a puplished code for this sampler, and I wLisää
I am firmware developer familiar with verilog HDL and have advanced knowledge about signal processing
I have read your suggestion and got what you wanted.
In the past, I have realized the i2c, spi and uart core usiLisää
I am an RTL Design Engineer and I have had first-hand experience in dealing with various Verilog related projects. I can definitely help you help you design a Gaussian filter in Verilog and deliver it within your dLisää