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Projekti/Kilpailu Kuvaus Tarjouksia/töitä Taitoja Alkoi Loppuu Hinta (EUR)
Implement RSA algorithm synthesized code (512 bit) in Verilog Hi, I would like to implement RSA algorithm synthesized code in Verilog up to 512 bit of encryption. - Encryption data output size can vary from 16-bit to 512 bits. - Prime number generation: two random prime number generated through LFSR and should be stored in FIFO - For every iteration different public and private key pairs should be produced. Kindly cont... 5 tekniikka, Verilog / VHDL, FPGA Feb 24, 2018 Feb 24, 20185 pv 18 h €131
QPSK FPGA Demodulator xilinx (Source code required) We need to develop a QPSK demodulator FPGA xilinx based. 13 elektroniikka, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Feb 22, 2018 Feb 22, 20184 pv 2 h €592
DDR3 memory controller interface using nexys video for read write multiple images We are working on nexys video board and we are trying to access DDR3 memory using IPCORE in vivado design suite software. We want to read and write data into DDR3 memory using nexys video board. 4 C-ohjelmointi, Verilog / VHDL, Mikrocontroller, Sulautetut ohjelmistot, FPGA Feb 21, 2018 Feb 21, 20182 pv 21 h €123
Verilog Servo controller I'm looking for someone who can write me a verilog HDL code for a servo controller 7 C-ohjelmointi, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Feb 18, 2018 Feb 18, 201810 h 30 min €23
FPGA Based NMR Spectrometer design Need to design a FPGA based NMR Spectrometer for NMR Applications. Phase 1 : Interface high speed ADC and DAC with Altera FPGA and write the software for generating RF pulses and Capture Echo Signal from ADC. See the attached similar work for more details. 10 elektroniikka, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Feb 16, 2018 Feb 16, 2018Loppunut €6461
need someone for FPGA work I would like someone to help me build a simple FPGA Kernel for a certain gaming system. I would like your help to improve a FPGA project we are using Altera Quartus programming software i have attached a QAR file First of all, compile it to a POF file and then send it to me and let me examine it and I will give you more instructions on how to proceed. It's not very complicated Let me ask... 9 C-ohjelmointi, elektroniikka, Verilog / VHDL, Mikrocontroller, FPGA Feb 12, 2018 Feb 12, 2018Loppunut €125
An expert in FPGA is required I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 4 C-ohjelmointi, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Feb 12, 2018 Feb 12, 2018Loppunut €121
FPGA QAR Project I have a QAR file that I cannot compile into a POF or PLD file, I would like someone with experience in FPGA to do it. It must be someone with real good knowledge of FPGA. 14 elektroniikka, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Feb 12, 2018 Feb 12, 2018Loppunut €400
FPGA work .... I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 5 C-ohjelmointi, elektroniikka, Verilog / VHDL, Mikrocontroller, FPGA Feb 11, 2018 Feb 11, 2018Loppunut €22
FPGA CONSOLE I would like someone to help me build a simple FPGA Kernel for a certain gaming system. 5 C-ohjelmointi, elektroniikka, Verilog / VHDL, Mikrocontroller, FPGA Feb 11, 2018 Feb 11, 2018Loppunut €17
Use edaplayground to run a carry lookahead adder need a 4-bit carry look ahead adder to be coded in system Verilog using edaplayground. 1) write system Verilog model for CLA 2) parameterize for N bits 3) generate/write test bench that works 11 C-ohjelmointi, Verilog / VHDL, Mikrocontroller, tietojärjestelmäarkkitehtuuri, FPGA Feb 8, 2018 Feb 8, 2018Loppunut €20
FIR Filter Reference Design in Verilog We are looking for a FIR filter design in Verilog with the following requirements: - 16-bit input, 16-bit fixed coefficient - 39-bit output - 256 taps Please provide 2 implementations: 1. serial implementation using 1 multiplier 2. partial parallel implementation with 4 multiplers 5 Verilog / VHDL, FPGA Feb 4, 2018 Feb 4, 2018Loppunut €179
Communication PCB for the Super Nintendo cartdrige slot I am looking for a freelancer with knowledge of assembly, microcontrollers, and pcb design. The project is about creating a communication pcb for an older video game console, the Super Nintendo / Super Nes. Let's have a really basic overview of the game system : The software game code is stored within a cartdrige. When the device is powered, the game's ROM placed on the cartdrige is ... 17 elektroniikka, Piirilevyn asettelu, Assembly, FPGA Feb 2, 2018 Feb 2, 2018Loppunut €1756
Petalinux on ZC706 I am looking for someone who has done work on Petalinux on ZC706 or Zedboard. The person MUST have done projects of Ethernet, PS Ram usage, external permanent memory storage using PCIe based drive, SPI control. I need to develop a project using above features. 1 Verilog / VHDL, FPGA Jan 29, 2018 Jan 29, 2018Loppunut €135
Project for Constantin R. Hi Constantin R., I noticed your profile and would like to offer you my project. We can discuss any details over chat. 3 Mikrocontroller, Piirilevyn asettelu, , Arduino, Piirisuunnittelu, FPGA Jan 12, 2018 Jan 12, 2018Loppunut €4987
need a VHDL expert asap vhdl expert needed asap to run a code 16 tekniikka, elektroniikka, Verilog / VHDL, sähkötekniikka, FPGA Jan 10, 2018 Jan 10, 2018Loppunut €16
License Plate Detection Using VHDL I'm building a license plate detection system, and concept has been proven using MATLAB. The current challenge is to implement the design on an Altera DE Board FPGA using VHDL. At this point, because of time constraints I like to ask for ur assistance in the following areas I seek someone who could help Implement the design on an FPGA. Attached is the matlab code 8 elektroniikka, Matlab ja Mathematica, Verilog / VHDL, sähkötekniikka, FPGA Jan 9, 2018 Jan 9, 2018Loppunut €464
SFP communication with FPGA Coding required for FPGA to SFP communication 13 elektroniikka, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Jan 6, 2018 Jan 6, 2018Loppunut €730
VHDL for programming FPGA board Hi, I run a small sales business in the video game industry. I am looking for someone with VHDL experience to assign pins on an FPGA board for an old video game system, to a new pre-designed break out board to allow the system to use HDMI. Please contact for details. 18 Verilog / VHDL, FPGA Jan 2, 2018 Jan 2, 2018Loppunut €103
Work with Digital Electronic and Analogue Analysis and design combinational and sequential digital logic, modeling concurrent digital systems using VHDL and Analogue filter. 13 elektroniikka, Matlab ja Mathematica, Verilog / VHDL, sähkötekniikka, FPGA Dec 28, 2017 Dec 28, 2017Loppunut €27
Need an expert in ASIC board - 1 Hello, everyone! I need you to design ASIC board for mining BTC. If you are an expert in this field, please bid this project. We can discuss more details over chat. Thanks in advance. 8 elektroniikka, valmistus, Mikrocontroller, sähkötekniikka, FPGA Dec 24, 2017 TänäänLoppunut €3942
Convert some VHDL to Verilog Contact me for more details. All I need done is porting some VHDL to Verilog. 18 tekniikka, Verilog / VHDL, Mikrocontroller, tietojärjestelmäarkkitehtuuri, FPGA Dec 23, 2017 Dec 23, 2017Loppunut €96
Need an expert in ASIC board Hello, everyone! I need you to design ASIC board for mining BTC. If you are an expert in this field, please bid this project. We can discuss more details over chat. Thanks in advance. 4 elektroniikka, valmistus, Mikrocontroller, sähkötekniikka, FPGA Dec 23, 2017 Dec 23, 2017Loppunut €3208
vhdl code using altera Design a digital system that will generate police or unbalance siren sound 9 tekniikka, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Dec 22, 2017 Dec 22, 2017Loppunut €107
FPGA Project (VHDL floating and real number mathematical operations using Simulink MATLAB) I need a vhdl program allowing FPGA to do aritmetic calculations with real values. For instance summing, substracting, dividing and multiplying 2 real number values as follows: (2.32 + 3.65; 2.32 - 3.65; 2.32/3.65 ; 2.32*3.65) I assume it suppose to be done using some toolbox on MATLAB ( System Generator Toolbox) This code should work on Xilinx Spartan 6. I want the code written simp... 10 Matlab ja Mathematica, Verilog / VHDL, sähkötekniikka, LabVIEW, FPGA Dec 21, 2017 Dec 21, 2017Loppunut €53
Microcontroller design Design and implementation of controller with VHDL in FPGA 13 elektroniikka, Verilog / VHDL, Mikrocontroller, FPGA Dec 19, 2017 Dec 19, 2017Loppunut €116
Generate GPS signal using verilog In my project , I have to generate gps signal using verilog code. For this I need C/A code, random data, carrier signal. So first I have to do bpsk to random data and c/a code then do bpsk with carrier signal . I have given you c/a code you have generate random data , carrier signal and give me output code as well as pictures within 1 or 2 days. 1 Verilog / VHDL, sähkötekniikka, FPGA Dec 19, 2017 Dec 19, 2017Loppunut €29
Multi-Core ASIC Design - SHA256 Looking for competent person to aide in design of algorithm & ASIC design for cryptocurrency. 8 FPGA Dec 18, 2017 Dec 18, 2017Loppunut €205
help me with modify some Verilog code know Verilog code, how how to use Quartus and FPGA board. 16 Verilog / VHDL, Mikrocontroller, sähkötekniikka, LabVIEW, FPGA Dec 15, 2017 Dec 15, 2017Loppunut €20
Create an ASIC board capable of hasing SHA256 (2-20Th/s) Good Day I am interested in finding somebody who will be able to design an ASIC board for my team and I. It needs to be able to hash SHA256 in order to mine bitcoin. It is up to you to decide whether you will be using FPGAs or other off-the-shelf ICCs. You will be working with some of the greatest experts in manufacturing and bussiness. It must meet or surpass the following specifications: ... 5 elektroniikka, Mikrocontroller, sähkötekniikka, Piirisuunnittelu, FPGA Dec 14, 2017 Dec 14, 2017Loppunut €294738
Simulink to VHDL I have done a controller for a battery energy storage system using Matlab Simulink. I need to generate VHDL codes for my controller. If you have NOT done that, please do not wast my time. 5 elektroniikka, Matlab ja Mathematica, Verilog / VHDL, sähkötekniikka, FPGA Dec 11, 2017 Dec 11, 2017Loppunut €19
simulation/ VHDL Expert Needed -- Urgent job -- b I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 7 tekniikka, elektroniikka, Verilog / VHDL, sähkötekniikka, FPGA Dec 9, 2017 Dec 9, 2017Loppunut €45
simulation/ VHDL Expert Needed -- Urgent job I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 0 tekniikka, elektroniikka, Verilog / VHDL, sähkötekniikka, FPGA Dec 9, 2017 Dec 9, 2017Loppunut -
DDR SD ram controller DESIGN AND TEST OF A DDR SDRAM INTERFACE FOR FPGA SYSTEMS Integrate and generate the IP core of DDR, then configure that IP Core, with DCM, PLL, FIFO, and some memory interface with State machine, possible to show the output of writing and reading the data,. with report of Area, power and delay,. Simulation in any standard simulator , Xilinx/Actel/libero 11 elektroniikka, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Dec 8, 2017 Dec 8, 2017Loppunut €364
FPGA Implementation of FIR filter 1. FIR design and simultion in Matlab. 2. Implement in FPGA(Xilinx Virtex-6 LX240T) and inter-connect with other logic blocks. 3. define registers for FIR filter and gain setting such that user can download filter co-efficients and gain settings through software to FPGA. 24 Matlab ja Mathematica, Verilog / VHDL, sähkötekniikka, FPGA Dec 7, 2017 Dec 7, 2017Loppunut €639
Design of MIPS Datapath components Using Logisim Course: Computer Organization and Architecture Project: Design of MIPS Datapath components Using Logisim Objectives After completing this project you will: · Design a 32x 32 bit register file · Design a 32 bit arithmetic and logic unit (ALU) Register File The register file consists of 32 x 32-bit registers and has the following interface as shown in Figure 1: _ BusA and BusB... 10 tekniikka, elektroniikka, Verilog / VHDL, Piirisuunnittelu, FPGA Dec 2, 2017 Dec 2, 2017Loppunut €37
design and implementation of a MIPS CPU with Multi cycle Data path design and implementation of a MIPS CPU with Multi cycle Data path using the VHDL language 14 C-ohjelmointi, Verilog / VHDL, C++ -ohjelmointi, Assembly, FPGA Nov 30, 2017 Nov 30, 2017Loppunut €128
bubble level project the project must be developed in verilog to be executed on the Nexys4DDR ™ FPGA Board. In the video attached in the .zip, the operation of the project 8 Verilog / VHDL, FPGA Nov 29, 2017 Nov 29, 2017Loppunut €68
VHDL code for Pipe lined MIPS-RISC (5 stage) processor.(Code for Un-pipelined will be given) I need you to do pipelining for the MIPS-RISC (5 stage) Processor. I will give you the MIPS processor code, all you need to do is pipelining. I will upload the file once go through it. If you are interested, I will send you the code and question for which code has written.” Deadline is " Dec-03-2017 " 12 C-ohjelmointi, tekniikka, Verilog / VHDL, FPGA, Rinnakkaisprosessointi Nov 29, 2017 Nov 29, 2017Loppunut €140
embedded s Project: The project consists of multiple phases. It is to develop a logic analyzer and waveform viewer (LA/WV) that can send data to a PC for display. The data collection is done on the FPGA board. A microprocessor gets data from the FPGA board and sends data to the PC through either a Bluetooth modem or a USB port. The system supports one analog channel and one digital channel, with a single... 2 FPGA Nov 28, 2017 Nov 28, 2017Loppunut €59
Network traffic processing using two FPGAs I want to get throughput and latency results of network traffic(Ethernet packets processing) using two FPGAs, while i have throughput and latency results of using one FPGA, so i want to compare both these results. The results of using two FPGA chips should be better than using one FPGA. 6 tekniikka, Verilog / VHDL, sähkötekniikka, Verkonhallinta, FPGA Nov 26, 2017 Nov 26, 2017Loppunut €549
SOC integration problem About timing violation at cross clock domain 1 FPGA Nov 26, 2017 Nov 26, 2017Loppunut €20
System verilog - open to bidding I need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. Thanks 10 C-ohjelmointi, Verilog / VHDL, C# -ohjelmointi, C++ -ohjelmointi, FPGA Nov 23, 2017 Nov 23, 2017Loppunut €9
single cycle 32bit mips verilog code -- 2 i need verilog code for 32bit mips single cycle it must contain instructions LW, SW, AND, ADD, ADDI, SUB, SLT, SLTI,b,BEQ, BNE, J, JAL and JR. and write a test-bench and stimulate and get the output waveform synthesis the code and submit to me 10 C-ohjelmointi, Verilog / VHDL, C++ -ohjelmointi, Assembly, FPGA Nov 23, 2017 Nov 23, 2017Loppunut €8
System Verliog task available I need someone who can do task on system verilog. Deadline is 2 days. I want someone who can start now. More details will be provided to interested freelancer 8 tekniikka, Matlab ja Mathematica, Verilog / VHDL, sähkötekniikka, FPGA Nov 22, 2017 Nov 22, 2017Loppunut €19
Computer Design and ProtoTyping build a 32 bit architecture CPU, the CPU include the Register File, ALU, Control Unit, Instruction Register, Data Memory, PC Register, Shift logic unit, Conditional Logic Unit, and a 3-level cache read and write memory for the Data memory. The units need to be built in Verilog HDL then represented as a symbol on a schematic diagram and connected together using wires. Accompanied with each unit s... 8 elektroniikka, Verilog / VHDL, Mikrocontroller, sähkötekniikka, FPGA Nov 22, 2017 Nov 22, 2017Loppunut €144
VHDL coding needed to be done by expert!! VHDL coding needed to be done by expert!! $30 CAD pay 8 tekniikka, elektroniikka, Verilog / VHDL, sähkötekniikka, FPGA Nov 22, 2017 Nov 22, 2017Loppunut €18
LabWindows/CVI Project Simple Update.(send emails when yields goes down) - open to bidding I need a little update in my Test Program (Labwindows). All code and GUI and all is done, just need program be capable to send email automatically to specified people when yields goes down <97%. 4 C-ohjelmointi, tekniikka, C# -ohjelmointi, Sulautetut ohjelmistot, FPGA Nov 21, 2017 Nov 21, 2017Loppunut €136
UVM verification of memory controller - open to bidding Need someone to verify a memory controller using UVM environment. CAN bus is used as a memory cycle initiator and write/read burst transactions need to be verified. 5 Perl, Verilog / VHDL, Shell Script, FPGA, Very-large-scale integration (VLSI) Nov 21, 2017 Nov 21, 2017Loppunut €305
SMC Interface and SPI Slave Logic for CPLD Project 1) Implement high-speed 8-bit bus for MCU (ATSAM3U) to connect to Altera CPLD (5M160ZM68C5N) 2) Implement SPI Mode-0 SPI Slave in CPLD logic 3) Implement Dual SPI Slave mode in CPLD logic 4) Implement QUAD SPI Slave mode in CPLD logic 5) Implement general purpose I/O (8-bit) Port B in CPLD logic 6) Implement JTAG Host shift logic in CPLD logic 7 C-ohjelmointi, elektroniikka, Verilog / VHDL, Mikrocontroller, FPGA Nov 21, 2017 Nov 21, 2017Loppunut €23
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