Duc D.

6 YEAR EXPERIENCE IN FPGA/VHDL/VERILOG - 100% JOB COMPLETED - COMPLETED ABOVE 100 JOBS IN FPGA/VHDL/VERILOG - 87 VERY GOOD REVIEWS I am an electronics engineer with excellent academic background, firm language skills (IELTS 6.0) and 5-years experience in TOP SKILLS below (Graduated Very Good Degree - Top 5% graduated Student at Top University in Vietnam) TOP SKILLS 1. FPGA Design. (VHDL/Verilog) 2. Embedded System Design. (Schematic, PCB Design) 3. Software Design. (C/C++/Java/Android/Matlab) TOOLS 1. Xilinx Vivado/Xilinx ISE/IP Core of Xilinx. 2. Altium/Orcad/KidCad design. 3. DevC++/Visual Studio C/C++/Eclipse/Netbeen. 4. Matlab/LabView LANGUAGES -English: IELTS 6.0 (Reading 6.5, Speaking 6.5, Writing 6.0, Listening 5.5)