Development of FPGA based flight control computers and communication for level A DO-254 systems Specific responsibilities included test bench modeling, architectural design, functional verification, MATLAB algorithms, RTL development static timing closure analysis, technical team and project leader, customer requirement capture.

Development for wireless communication sub systems using the PowerPC 403 and FPGAs Specific responsibilities include: DSP to FPGA implementation algorithms, RTL block-level verification of DSP algorithms and static timing closure analysis. Interface with hardware/software design engineers to design, test and verify electrical interfaces. MATLAB algorithm development