Sherif A.

I am Sherif Abou Zied a digital design engineer specialized mainly in digital communication systems H/W design and implementation. I have got my BSc in Communication and Electronics engineering from Helwan University. Currently, I'm working on my master thesis at Nile University major "Micro-electronics System Design". My research topic is on the design of LDPC decoders for wireless communication systems. During my study at Nile University, I have been involved in many design projects including JPEG encoder, full custom design of 32-bit adder and RISC processor. My overall GPA at Nile University is 3.43. Currently I am working at Varkon-Semiconductors as a senior digital design engineer. Through my career, I have been involved in ASIC and FPGA projects for wireless communication systems mainly OFDM systems including DVB-C, WIFI 802.11n, LTE and application specific non standard OFDM projects. During these projects, I was involved in the development of new and sophisticated IP cores as well as getting an insight into the SoCs and systems they are integrated into. I was responsible for developing major design blocks and IP cores, specifically RTL development of synchronization blocks, Forward Error Correction blocks such as LDPC, control logic and state machines. Also I was involved in the complete front-end design cycle; specification, architecture, RTL design, synthesis trials, verification, through to customer support.