I need to implement an FFT on FPGA Arty board, with verilog on vivado software. My project starts with designing an ADC which is internal (On Chip XADC) to sample an analog signal, then store that sampled data on memory, then insert these sampled data from memory to FFT core.
So far that's all what i need, in fact i have already started to design but my design doesn't work for an unknown reason! Here below i have submitted my design. There 2 different designs below one is with using the memory to windowing the signal (MainModule.v), and the other is continuous processing of data to the FFT with pipelined streaming architecture (Top Module.v).
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Dear sir I have more than 9 years experience in digital design using fpga, please check my profile also please message me so that we can discuss Best regards