I'm a PhD student and software engineer, I have a good experience in VHDL/Verilog, I have done a similar project like this one and I can help you to do it perfectly with its testbench .
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$10 USD 1 päivässä
9 freelanceria on tarjonnut keskimäärin $18 tähän työhön
I am Mtech graduate from IIT Roorkee and working on Hardware Description Languages Verilog and VHDL for the past 3 years. I have done many Digital system design projects using RTL design and FSM and had a working Lisää
I'm interested in your project and I can do it with the perfect method and time.
I'm an expert in the design and development of VLSI and digital integrated circuits using Cadence virtuoso, Quartus and ModelLisää
I am master graduated in VLSI design and Embedded systems and also had 3 years of experience in developing algorithm especially mathematical functions, digital circuits and signal processing algorithm in veLisää