build mac unit using verilog language.
I have already done the multypler part and I need help to build the rest
9 freelanceria on tarjonnut keskimäärin %project_bid_stats_avg_sub_26% %project_currencyDetails_sign_sub_27% tähän työhön
Hi, I'm interested in your Mac design using Verilog HDL. I have 7+years of experience in Electrical Engineering in academics. Contact me for further details. Regards,
Can we use VHDL ? I am comfortable in VHDL only. I have designed and coded Adder, Multiplier, Divider and Accumulator before so I can do this one easily. .
I have a good experience in this language.I can lead you effectively on this [login to view URL] is nothing but simple add on depending on your requirements.