Our aim with this task is to have a working ethernet stack on which we can evaluate the performance of the Zynq + GEM (Gigabit Ethernet MAC) + FreeRTOS TCP.
The task is as follows:
1. You must have a Zynq 7000 series development board with an ethernet port.
2. You must have Xilinx Vitis / Vivado tools installed.
3. All code on the Zynq should be in the C language.
1. Create a Vitis project for a Zynq 7000 device and a Vivado project that supports ethernet on your hardware.
2. Ensure the project runs FreeRTOS
3. Download FreeRTOS PlusTCP
4. Configure FreeRTOS PlusTCP to bring up an ethernet connection on the Zynq and demonstrate some common functionality as detailed below:
We require a demonstration that the FreeRTOS PlusTCP task can:
1. Bring up the ethernet link
2. Obtain an IP address from a DCHP server, or if the server is not available, configure an IP address manually.
3. Send and Receive a UDP packet to a PC
4. Send and Receive a TCP packet to a PC
5. Send and Receive UDP packets at the maximum possible rate. Ideally we want to achieve more than 10MB/Sec transfer rates.
1. The Vitis project
2. The source code for the FreeRTOS PlusTCP task(s) which produce the demonstrations above
3. The ipCONFIG header file for FreeRTOS PlusTCP
4. A method for reproducing the demonstrations, for example a python script to send and receive UDP/TCP packets.
1. There are quite a lot of demonstration projects on the web, it is acceptable to reference the demonstration projects.