I want someone who can code using uVM and build a layered testbench for an LC3 Micro Controller.
Verification Engineer here having 3.5 years experience in developing UVM test benches. Relevant Skills and Experience System verilog,UVM,perl,python,make file
6 freelanceria on tarjonnut keskimäärin %project_bid_stats_avg_sub_26% %project_currencyDetails_sign_sub_27% tähän työhön
Having very good experience in UVM based verification methodology. Using systemverilog UVM for more than 7 yrs. I can do this well without any issues.
I have 5+ years in UVM and systemverilog. I worked at Intel and currently develop UVM test bench and environment. please message me privately if my service can be of use.