Solve a bug on Verilog on NetFPGA board implementation (access to 2 NetFPGAs required) - repost

We need a Verilog expert to solve a bug on NetFPGA implementation of a modified Ethernet switch. It might be related with timing limitations of the Verilog code to gate conversion handling table writing and reading of MAC addresses at a table. More details on request.


Taidot: elektroniikka, Verilog / VHDL

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Tietoa työnantajasta:
( 0 arvostelua ) Spain

Projektin tunnus: #4292238

3 freelanceria on tarjonnut keskimäärin %project_bid_stats_avg_sub_18% %project_currencyDetails_sign_sub_19%/tunti tähän työhön


Hi, Expert in VLSI/Verilog/FPGAs here... I can do this. More details on PM.

€30 EUR / tunti
(2 arvostelua)

Hi,i have read your post very carefully, and I m pretty interested in it. I m an expert with 5 years Experience on telecommunication system&timing analysis. guess i m the right man u r looking for,I can fix your pro Lisää

€20 EUR / tunti
(0 arvostelua)

I have telecom and FPGA experience. Can apply advanced methodologies to the project to solve the problems.

€30 EUR / tunti
(0 arvostelua)