
Completed
Posted
Paid on delivery
OVERVIEW -------- I need a KiCad PCB designer to take a fully verified analogue circuit design and implement it correctly in KiCad, producing production-ready gerbers for JLCPCB. The circuit design is complete — this is a layout and EDA implementation job, not a design-from-scratch job. The board is a 6-cell LTO battery active balancer, 20A per channel, entirely analogue (no microcontroller). I need 4 identical boards to cover a 24S 15P Yinlong 66160 45Ah home battery pack. I plan to order 50 boards after a 5-board prototype run. BOARD SPECIFICATIONS -------------------- Board size: 250 x 120 mm Layers: 6 (JLCPCB stackup JLC06161H-3313) Outer copper: 2oz (L1 [login to view URL] and L6 [login to view URL]) Inner copper: 0.5oz (L2 through L5) Surface finish: HASL lead-free Soldermask: Green / White silkscreen Manufacturer: JLCPCB — files must pass JLCPCB online DRC Components: ~60 THT + ~25 SMD per board Max current: 20A per channel, 3 channels per board EDA tool required: KiCad 7 or 8 (not Altium, not EasyEDA) WHY THE EXISTING FILES CANNOT BE USED -------------------------------------- I have reference gerbers and documentation but they were generated programmatically (not through an EDA tool) and have two critical defects that would destroy the boards on first power-on: 1. CRITICAL — L6 copper fill shorts all power zones to GND. The back copper layer has a full-board GND fill AND 6 isolated power zones. In Gerber format all copper regions are additive, so every power zone is shorted to GND. A proper KiCad zone fill with correct priority settings fixes this automatically. 2. CRITICAL — Inner GND planes (L2, L4) have no anti-pads. Solid copper fills with zero clearance around non-GND through-hole pads means every VCC pin, inductor pad, and signal pin is shorted to GND on those layers. KiCad generates anti-pads automatically when the design is built correctly with proper net assignments. Both issues are standard KiCad zone management — they only require an experienced KiCad user who has done multi-layer boards before. Two additional issues to fix: 3. The KiCad source files I have are documentation stubs only and cannot be opened in KiCad. A real KiCad project must be built from scratch using my reference gerbers and component list. 4. The L6 power zone stems at the J1 connector row are 3.8mm wide — these should be widened to 5mm for manufacturing tolerance. SCOPE OF WORK ------------- 1. Build a real KiCad schematic from the provided component list and reference stub. All components, values, and connections are specified. No circuit design decisions are required. 2. Build the 6-layer KiCad PCB with the correct JLCPCB stackup. Component positions must match the reference gerbers exactly — this is a constrained layout, not free placement. 3. Route all signal traces to match the reference: - L1: 8mm wide power bus, 0.5mm signal traces, 3mm fuse bridges - L3: 0.8mm sense traces (FU input to LM393 comparator inputs) - L5: 0.5mm sense traces (FU output to J1 connector) 4. Create the 6 L-shaped copper pour zones on L6 (the most critical task). Each zone connects one J1 screw terminal pad to the corresponding MOSFET drain pad through the PCB, replacing external fly-lead wires. Zones must use correct KiCad zone priority so the GND fill sits around them without shorting. Full zone coordinates are provided in the documentation. 5. Verify inner GND planes (L2, L4) have correct anti-pads around all non-GND pads. KiCad handles this automatically with correct net assignments — just needs to be confirmed in the copper preview. 6. Run JLCPCB DRC in KiCad — zero errors required. 7. Generate the complete JLCPCB gerber package (12 gerber files + 2 drill files) and do a test upload to JLCPCB Gerber Viewer. Provide a screenshot of the accepted result. 8. Deliver the full native KiCad project (.kicad_pro, .kicad_sch, .kicad_pcb, all footprint libraries). Must open cleanly in KiCad 8. WHAT I PROVIDE -------------- Upon project award (after NDA) I will share a ZIP containing: - Reference gerbers for all 6 layers (exact pad coordinates, trace routes, and zone geometry to replicate in KiCad) - KiCad stub files (component list and topology reference) - Verified BOM and CPL files with JLCPCB LCSC part codes and XY positions - 9-page full-colour layer render PDF showing every layer in detail - 78/78 verification report confirming all signal connections correct (use this as your netlist acceptance checklist) - A3 top-down PCB render at 1:1 scale with all component positions labelled - Full assembly guide with component positions and designators - JLCPCB order settings and stackup specification L6 POWER ZONE DETAILS ---------------------- This is the key technical feature of the design. There are 6 isolated copper zones on L6 (bottom copper), each connecting one J1 screw terminal to one MOSFET drain pad. Zone shape: a 5mm-wide horizontal corridor at the drain's Y position, plus a vertical stem connecting to the J1 pad row at y=60mm. All drain pads are at x=170mm. J1 pads are at x=58 to 84mm. Zone assignments (all at x=50 to 175mm): Net C0- J1-P1 (x=58.00mm) -> drain y=80mm, corridor y=77.5-82.5mm Net C1 J1-P2 (x=63.08mm) -> drain y=100mm, corridor y=97.5-102.5mm Net C2 J1-P3 (x=68.16mm) -> drain y=40mm, corridor y=37.5-42.5mm Net C3 J1-P4 (x=73.24mm) -> drain y=52mm, corridor y=49.5-54.5mm Net C4 J1-P5 (x=78.32mm) -> drain y=25mm, corridor y=22.5-27.5mm Net C5 J1-P6 (x=83.40mm) -> drain y=15mm, corridor y=12.5-17.5mm Each zone is 5mm wide = 20.6A capacity (IPC-2221A, 2oz outer, dT=30C). Minimum clearance between zones: 5mm. The GND fill on L6 must be lower priority and must not touch the zone copper. ACCEPTANCE CRITERIA ------------------- Payment will be released when all of the following are confirmed: 1. KiCad DRC shows zero errors (include DRC report in delivery) 2. JLCPCB Gerber Viewer accepts all 12 files (include screenshot) 3. L6 zones are visibly isolated from GND fill in KiCad copper preview 4. Anti-pads present on L2 and L4 around all non-GND pads 5. All 78 verified signal connections present (checked against my report) 6. KiCad project files open cleanly in KiCad 8 on my machine 7. Pad positions within 0.1mm of reference gerber coordinates 8. JLCPCB stackup correctly set as JLC06161H-3313 Milestone payments: 50% on KiCad DRC pass, 50% on JLCPCB acceptance. I will complete my review within 3 business days of receiving files. REQUIREMENTS FOR BIDDERS ------------------------ - KiCad 7 or 8 must be your primary tool (not Altium or EasyEDA) - You must have completed at least one 6-layer KiCad board before - You must understand copper pour zone priority and inner-layer anti-pads - JLCPCB experience required — you must know their DRC rules - In your bid, briefly describe a multi-layer KiCad project you have completed and provide a portfolio link or GitHub if available - Timeline: 7 days from project award - A simple NDA will be signed before reference files are shared This is a 1-2 day job for an experienced KiCad user. The circuit design is done and all trace routes, component positions, and zone geometry are fully documented. The only genuine complexity is correctly managing the KiCad zone fills — something any 6-layer KiCad designer will be familiar with.
Project ID: 40370439
15 proposals
Remote project
Active 1 mo ago
Set your budget and timeframe
Get paid for your work
Outline your proposal
It's free to sign up and bid on jobs

I will convert your verified analogue design into a precise, production-ready KiCad 8 project with clean JLCPCB Gerbers. Experienced in 6-layer PCB layout, high-current routing (2oz), and controlled stackups. I will rebuild the schematic from BOM and replicate the layout exactly from reference Gerbers. Critical L6 copper zones will be implemented using correct priority to prevent GND shorting. Inner GND planes (L2, L4) will include proper anti-pads for all non-GND vias and pads. All routing rules (power, sense, fuse traces) will be followed as specified. Full DRC check in KiCad with zero errors and JLCPCB viewer validation included. Final files: complete KiCad project, Gerbers, drill files, and verification reports. Timeline: 5–7 days with milestone-based delivery.
$500 AUD in 7 days
6.6
6.6
15 freelancers are bidding on average $570 AUD for this job

I am a skilled and reliable Embedded Systems Engineer with over 6 years of hands-on experience in Arduino, ESP32/ESP8266, and microcontroller-based development. I specialize in designing efficient, stable, and scalable embedded solutions, turning ideas into fully functional hardware-software systems. I have a strong background in electronics, sensors, communication protocols (UART, I2C, SPI, MQTT, WiFi, BLE), and real-time embedded systems. My development approach focuses on clean, well-structured, and well-documented firmware, ensuring long-term reliability and easy maintenance. I also provide thorough testing, debugging, and performance optimization, including power efficiency improvements where required. I am a detail-oriented engineer with strong problem-solving skills and extensive experience in hardware debugging and firmware optimization. Beyond technical expertise, I value clear communication, meeting deadlines, and maintaining high client satisfaction. I work closely with clients to fully understand project requirements and deliver high-quality results. Pricing is flexible and can be discussed based on project scope and complexity. I am open to both short-term and long-term projects. Let’s work together to build a professional, reliable, and efficient embedded system for your needs.
$750 AUD in 7 days
7.3
7.3

As a professional Electrical/Electronics Engineer and PCB Designer with over 8 years of proficient experience, I specialize in building high-quality circuit boards using KiCAD, among other EDA tools. This project aligns perfectly with my expertise and professional track record. With an impressive knowledge in KiCAD, Eagle, Altium, and EasyEDA, I have successfully executed similar complex tasks involving multiple layers. Moreover, my Github portfolio attests to my ability to quickly grasp existing designs and reimplement them with precision using reference gerbers and documentation, which will be invaluable in your task's scope. My command over Mathematics fits perfectly for accurate calculations needed for trace width (L1: 8mm, L5: 0.5mm) and other factors essential to producing production-ready PCBs. With due attention to detail and strict adherence to your specifications, I will not only design the real KiCad schematic from scratch but also route all signal traces according to the reference designs. Lastly, to guarantee error-free Gerber package delivery, I will conduct JLCPCB DRC checks ensuring it passes muster with zero warning reported before uploading to JLCPCB Gerber Viewer. My ultimate goal is customer satisfaction through efficient problem-solving; let's convert your electrical circuitry idea into an operable solution together!
$500 AUD in 3 days
6.9
6.9

Boasting over 5 years of experience in circuit designs, electrical engineering, and PCB layout, I am Sakshi, a perfect fit for your KiCad PCB project. I have dealt extensively with complex analog circuits and boards similar to your battery balancer design, giving me an edge needed to deliver precise results. With the understanding of your LTO battery active balancer design, I can skillfully implement the schematic you supplied into a production-ready gerber file optimized for JLCPCB.
$251 AUD in 1 day
3.9
3.9

Being an experienced PCB designer, I am well-versed in KiCad, giving me the proficiency necessary to rectify the errors that hinder the use of your reference gerbers and documentations. Moreover, I have ample experience with multi-layer boards and am confident in overcoming the KiCad zone management challenges to ensure optimal performance of your LTO battery balancer. My understanding of JLCPCB's specifications also ensures that any problems regarding the implementation will be resolved swiftly. I comprehend the project's scope and its constraints. I can assure you that I will meticulously translate the component list and references into a real KiCad schematic without altering any circuit design decisions. Additionally, my strong attention to detail will ensure that all traces align correctly and components are positioned accurately as per your provided gerber files. Best Regards Sumit
$255 AUD in 2 days
3.2
3.2

I will rebuild your active balancer PCB from scratch in KiCad 8, using your reference gerbers, component positions, and routing specifications as the exact template. The critical defects in the programmatically generated files (L6 power zones shorted to GND, missing anti-pads on inner layers) will be corrected through proper KiCad zone management. The deliverable will be a production-ready JLCPCB gerber package that passes their online DRC with zero errors.
$500 AUD in 7 days
3.1
3.1

As an accomplished electrical engineer and PCB designer with substantial experience in designing complex, multi-layered boards using KiCad, I am confident in my ability to tackle the challenges you've outlined for your 6-Layer KiCad PCB Layout — LTO Battery Balancer project. I'm well-prepared to resolve all four issues you've identified, as they are, in fact, standard challenges that highly-skilled users of KiCad can effectively and proficiently address. In addition to solving your existing problems with the power zones, I can seamlessly build the KiCad project from scratch using your reference gerbers and component list. You need not worry about taking circuit design decisions as the design is finalized; my role here will be to serve as an efficient and diligent implementer of your verified analogue circuit design. I am intimately familiar with JLCPCB's requirements and have a track record of generating production-ready gerbers that pass JLCPCB online DRC with zero errors. I fully understand the importance of complying with specific manufacturing tolerances and adhering meticulously to board sizes and copper pour specifications. With my skills and focus on delivering complete, high-quality designs, you can trust me to create a detailed, precise design efficiently and accurately.
$500 AUD in 7 days
1.1
1.1

Hey , I just finished reading the job description and I see you are looking for someone experienced in PCB Layout, Electrical Engineering and Circuit Design. This is something I can do. Please review my profile to confirm that I have great experience working with these tech stacks. While I have few questions: 1. These are all the requirements? If not, Please share more detailed requirements. 2. Do you currently have anything done for the job or it has to be done from scratch? 3. What is the timeline to get this done? Why Choose Me? Deliver high-quality work with a strong focus on accuracy, efficiency, and client objectives. Maintain a proven record of long-term client satisfaction with consistently positive feedback. Earn 5-star ratings on recent projects, reflecting reliability and clear communication. Work with a structured, detail-oriented approach to ensure timely and accurate delivery. Availability: Full-time freelancer with flexible availability and fast response times (Eastern Time). I will share with you my recent work in the private chat due to privacy concerns! Please start the chat to discuss it further. Regards, Ali Rashdi.
$250 AUD in 2 days
0.0
0.0

Hi there, I’m Clinton Kipkoech, an Electrical Engineer specializing in KiCad 8. I’ve reviewed your project and clearly understand why your current files are failing. I can rebuild this board from scratch to ensure a flawless, production-ready result for JLCPCB. My Technical Solutions: Zone Priority & Isolation: I will use KiCad’s priority settings to ensure the L6 power zones stay isolated from the GND fill. Netlist Integrity: By building a proper schematic, I’ll ensure L2/L4 anti-pads are automatically generated for all non-GND through-holes. High-Current Layout: I will widen the L6 stems to 5mm to safely handle 20A on 2oz copper, matching your exact coordinate specs within 0.1mm. DFM Pass: I will use the JLC06161H-3313 stackup and guarantee a zero-error JLCPCB DRC. I recently designed a high-current STM32 power board and am very comfortable with manual zone management. I’ve signed the form and am ready for the NDA to start immediately. Best regards, Clinton Kipkoech
$550 AUD in 7 days
0.0
0.0

Dear Sir, I understand your concerns about this design, such as the importance of antipads. We can deliver a kicad design satisfying the requirements mentioned in the description of the project. In my team we have experience in the design of multilayer PCBs. Please contact us to discuss more details about the project. B/R
$250 AUD in 7 days
0.0
0.0

Glen Davis, Australia
Payment method verified
Member since Apr 14, 2026
€750-1500 EUR
$250-750 AUD
$250-750 USD
₹4000-6000 INR
£5-10 GBP / hour
$200 USD
$250-750 USD
€250-750 EUR
$50000-100000 USD
₹100-400 INR / hour
$250-750 USD
₹12500-37500 INR
₹600-1500 INR
€12-18 EUR / hour
₹12345-123456 INR
₹37500-75000 INR
€12-18 EUR / hour
$250-750 USD
₹1500-12500 INR
₹1500-12500 INR