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    3,087 verilog vhdl työtä löytyi, hinnoittelu EUR
    Simple VHDL task Loppunut left

    Simple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL taskSimple VHDL task

    €81 (Avg Bid)
    €81 Keskimäär. tarjous
    1 tarjoukset

    I am using Altera DE2-115 FPGA board to configure it using Quartus software 17 lite edition. We have to use QSYS to assign addresses and link the processor, then assign inputs and outputs in VHDL and pin planner in Quartus, and then use NIOS II processor for Eclipse to write a program in C and run the board. I am seeking some help in building this mini thing. I am attaching a pdf file for the tas...

    €20 / hr (Avg Bid)
    €20 / hr Keskimäär. tarjous
    6 tarjoukset

    I need a verilog code that create a 16 bit "Calculator" that uses the slide switches as binary input, and uses the push-button cross as action triggers. The accumulator value should be displayed on the seven segment display in hexadecimal. the center button should be clear, and the four buttons should be ADD, SUBTRACT, AND and XOR.

    €24 (Avg Bid)
    €24 Keskimäär. tarjous
    5 tarjoukset

    Implementation of Fractional-order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please, please.

    €86 (Avg Bid)
    €86 Keskimäär. tarjous
    3 tarjoukset

    Implementation of Fractional order Integer/ Derivative Using GL algorithm based VHDL on FPGA. simple code which i need.

    €83 (Avg Bid)
    €83 Keskimäär. tarjous
    12 tarjoukset

    I require a working code in verilog/VHDL/C for an FIR Filter to be implemented on an Altera FPGA

    €102 (Avg Bid)
    €102 Keskimäär. tarjous
    12 tarjoukset

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : fix neural network *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in training. *All of this should be printed in the ...

    €42 (Avg Bid)
    €42 Keskimäär. tarjous
    4 tarjoukset

    I am currently using Altera DE2-115 FPGA board to configure it using Quartus 17 lite edition software and write the code in VHDL. We have to use QSYS, and NIOS II for Eclipse to write a program in C and to run the board. I am seeking some help in building this mini thing.

    €24 (Avg Bid)
    €24 Keskimäär. tarjous
    2 tarjoukset

    We are seeking 1 FPGA Design Engineer for our new product development. FPGA Design Engineer Responsibilities: • Completing implementation in RTL • Ensuring robust and complete timing constraints • Optimizing FPGA code to balance performance, area, power, complexity and timing • Determining and executing development, integration, bring-up and test plans. • Working closely ...

    €33 / hr (Avg Bid)
    €33 / hr Keskimäär. tarjous
    25 tarjoukset
    GL algorithm Expert Loppunut left

    hello, I am looking for expert who build GL algorithm using VHDL. If you can do it, we will discuss in details.

    €33 (Avg Bid)
    €33 Keskimäär. tarjous
    7 tarjoukset

    Implementation of Fractional-order function (S^e) on FPGA using VHDL. I don't want imaginary freelancer, please, please.

    €45 (Avg Bid)
    €45 Keskimäär. tarjous
    5 tarjoukset
    Eye pupil tracking Loppunut left

    I would like to do project in human eye pupil tracking system for video sequence using Verilog in Xilinx spartan 6 FPGA. Here with attached my equirements Requirements: 1. Find the pupil center coordinates and radius for various eye's. 2. Coordinates should be constant intervals while tracking. 3. Only video sequence to be used.... Not for image. Kindly send me possibility of above …...

    €62 (Avg Bid)
    €62 Keskimäär. tarjous
    2 tarjoukset

    i need a 8-bit comparator characterizing overdrive, to be implemented on FPGA, using Verilog also I need the constrains file

    €20 (Avg Bid)
    €20 Keskimäär. tarjous
    9 tarjoukset
    FPGA/VHDL/Verilog Loppunut left

    Looking for implementation of a Ethernet Tester, generating and analyzing Ethernet traffic at 1G and 10G. More details on PM. J

    €11 / hr (Avg Bid)
    €11 / hr Keskimäär. tarjous
    25 tarjoukset

    BCD adder vhdl code which detects an overflow using vivado

    €7 (Avg Bid)
    €7 Keskimäär. tarjous
    6 tarjoukset

    Please read carefully. You need to fix my code. I will sent to you in messages my project. Here is project description: The brightness measurement with help of PMODALS sensor ([kirjaudu nähdäksesi URL:n] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([kirjaudu nähdäksesi URL:n]) is to be used, which ta...

    €472 (Avg Bid)
    €472 Keskimäär. tarjous
    14 tarjoukset
    Camera development Loppunut left

    Opal Kelly front panel, C++, Verilog, XEM6010. Must have experience with Opal Kelly front panel, since this project will be similar with the EVB100X-DEV. Same concept, but different sensor.

    €2033 (Avg Bid)
    €2033 Keskimäär. tarjous
    19 tarjoukset
    GPS implementation Loppunut left

    first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PCB of the board you have. U3 is ...

    €304 (Avg Bid)
    €304 Keskimäär. tarjous
    5 tarjoukset
    build opencl code Loppunut left

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : Build a deep neural network using some of approximate MAC UNIT, *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in traini...

    €288 (Avg Bid)
    €288 Keskimäär. tarjous
    10 tarjoukset

    Hi Rajagopal S., I noticed your profile and would like to offer you my project. We can discuss any details over chat. The brightness measurement with help of PMODALS sensor ([kirjaudu nähdäksesi URL:n] ) should be realized. For this purpose, the Basys 3 FPGA board should be used. Furthermore, an 8051 microcontroller IP core([kirjaudu nähdäksesi URL:n]) is to be used, which tak...

    €200 (Avg Bid)
    €200 Keskimäär. tarjous
    1 tarjoukset

    ----------------------------------------------------------------------------------------------------------------------------------------- The requirements : Build a deep neural network using some of approximate MAC UNIT, *To build everything in Verilog, *The accuracy test by using the MNIST database and the training function *To find out the best accuracy it can be and the time take in traini...

    €157 (Avg Bid)
    €157 Keskimäär. tarjous
    12 tarjoukset

    Provide VHDL code and testbench simulation for ECP5 Lattice device (Diamond Studio) to read HX711 sample ([kirjaudu nähdäksesi URL:n]) And store it in 32bit register

    €160 (Avg Bid)
    €160 Keskimäär. tarjous
    6 tarjoukset
    Research help -- 3 Loppunut left

    Hello, this is the task: "first task will be to use the xtal oscillator board that I designed and that works, together with the FPGA to read the GPS data and then synchronise the 40 MHz Voltage Controlled Xtal oscillator to the 1 second pulse produced by the GPS. That is called a frequency loacked loop. We will talk about the details of that on Monday. I have attached the schematic for the PC...

    €286 (Avg Bid)
    €286 Keskimäär. tarjous
    8 tarjoukset

    Hi. I have a Terasic De1SoC and would like to learn how to use it. I am completely knew and have seen content from a similar project and interested on these topics About VLSI Advanced Digital System Design VHDL Verilog RTL Design FPGA Design Implementing various encryption and decrypt algorithms SystemVerilog VMM Methodology OVM Methodology UVM Methodology I have C programming background

    €30 / hr (Avg Bid)
    €30 / hr Keskimäär. tarjous
    1 tarjoukset

    I need vhdl code for signal processing. I need 256 point fir filter and 4096 point fft. create bid, many experience in signal processing. chatting discussing in detail

    €145 (Avg Bid)
    €145 Keskimäär. tarjous
    14 tarjoukset

    I need a sample code on DE-10 code for utilizing the FPGA-HPS bridge with more emphasis on hardware acceleration. (C ,VHDL prefferd /Verilog). I am trying to explore the functionality where I can write some data from HPS to the FPGA. let the FPGA process it and HPS read back the result. I need to see some processing happening in FPGA on request from HPS . IT could be as simple as AND impleme...

    €99 (Avg Bid)
    €99 Keskimäär. tarjous
    6 tarjoukset

    Scope includes the programing (vhdl) for the measurement and of AC voltage, currents, Power (active, reactive and apparent power) and Power Factor in FPGA (Spartan-6). Interfacing ADC and sensors with FPGA for current and voltage measurements. It also includes the display of measured parameter on LED display which is inbuilt on board). This is the brief requirement, interested people may contact ...

    €93 (Avg Bid)
    €93 Keskimäär. tarjous
    6 tarjoukset

    More details will be shared via chat

    €15 (Avg Bid)
    €15 Keskimäär. tarjous
    9 tarjoukset

    More details will be shared via chat

    €18 (Avg Bid)
    €18 Keskimäär. tarjous
    7 tarjoukset

    Design and Document a VHDL Complex Mixer • Design should contain two 11-bit complex NCOs (Numerically Controlled Oscillator): • Assume clock freq of 100MHz • NCO #1: 11MHz • NCO #2: 18MHz • Design a complex multiplier component • Multiply the outputs of NCO #1 and #2 • Write the outputs of the NCOs and Complex Multiplier to a text file Theory of operation Detai...

    €62 (Avg Bid)
    €62 Keskimäär. tarjous
    5 tarjoukset

    Implementation of Fractional-order function (S^e) on FPGA using VHDL. (I need to fix my code only) I don't want imaginary freelancer, please.

    €93 (Avg Bid)
    €93 Keskimäär. tarjous
    15 tarjoukset
    €174 Keskimäär. tarjous
    10 tarjoukset

    Complete few tasks on Verilog software

    €73 (Avg Bid)
    €73 Keskimäär. tarjous
    11 tarjoukset
    Code on Verilog Loppunut left

    Complete few tasks on Verilog software

    €58 (Avg Bid)
    €58 Keskimäär. tarjous
    7 tarjoukset

    Have several ways to effectively reduce sidelobe the ACAR. In order to overcome the contradictions of weight-based processing techniques and ensure high resolution, I intend to use the NLFM signal. I want to do all the processing with one FPGA without using any other block like DDS. There is an expectation that a signal generator for NLFM signal with resolution of 2 ^ 32 and FIR code for correspon...

    €201 (Avg Bid)
    €201 Keskimäär. tarjous
    10 tarjoukset

    Hey looking for some help with some introductory logic building using Verilog code on the vivado software. Also Its for basys3. It’s really elementary and if you know how to use vivado this should be quick and easy money for you. Thanks

    €21 (Avg Bid)
    €21 Keskimäär. tarjous
    30 tarjoukset

    I need help in compiling a verilog code. I have already built a code that runs on a platform but when i run it on multisim, it gives me errors. I need an expert to guide me with this

    €11 (Avg Bid)
    €11 Keskimäär. tarjous
    4 tarjoukset

    I want to create a simple CPU the do some mathematics logic between two matrices using Verilog code

    €256 (Avg Bid)
    €256 Keskimäär. tarjous
    5 tarjoukset

    Hi, I need to emulate a crystal oscillator circuit (attached) based on wave digital filter (WDF). Basically we aim to have WDF emulation that match a Spice simulation (e.g. in Cadence). I Already have the circuit simulated in Cadence (the output attached) . Attached, my circuit (Crystal Oscillator) schematic that needs to be mapped to WDF along with its output waveform, you will notice that there ...

    €1011 (Avg Bid)
    €1011 Keskimäär. tarjous
    15 tarjoukset
    Project for Jin Q. Loppunut left

    Hi Jin :) I have an assignment which I'm not able to get through..I have a small doubt with the VHDL code I have and I just need to fix it.. It won't take more than 15 mins for you hopefully. The code emulates a vending machine on an ALTERA DE2-115 Board and the push buttons simulate an insertion of a coin..and the incremented value is displayed on the 7 segment display and when the val...

    €27 (Avg Bid)
    €27 Keskimäär. tarjous
    1 tarjoukset
    Project for Nick B. Loppunut left

    Hi Nick :) I have an assignment which I'm not able to get through..I have a small doubt with the VHDL code I have and I just need to fix it.. It won't take more than 15 mins for you hopefully. The code emulates a vending machine on an ALTERA DE2-115 Board and the push buttons simulate an insertion of a coin..and the incremented value is displayed on the 7 segment display and when the va...

    €27 (Avg Bid)
    €27 Keskimäär. tarjous
    1 tarjoukset
    Project for Jin C. Loppunut left

    Hi Jin :) I have a small doubt with the VHDL code I have and I just need to fix it.. It won't take more than 15 mins for you hopefully. The code emulates a vending machine on an ALTERA DE2-115 Board and the push buttons simulate an insertion of a coin..and the incremented value is displayed on the 7 segment display..however my code is glitchy...if you could help me fix it it'd be a life...

    €27 (Avg Bid)
    €27 Keskimäär. tarjous
    1 tarjoukset

    Need to write VHDL program for Genesys 2 board for connecting a temperature sensor to xadc pin and display it in external LCD board

    €56 (Avg Bid)
    €56 Keskimäär. tarjous
    8 tarjoukset

    I have a task on verilog and i want someone who is experience on it to help me with it. Please bid only if you know youre an expert. I will share details with interested freelancer. Budget is limited, hiring will be on a weekly basis

    €22 (Avg Bid)
    €22 Keskimäär. tarjous
    3 tarjoukset

    Hi, I need a basic example of a state machine in VERILOG. We need to find the pattern "100" using machine states. We have 4 states: S0: Initial state S1: If 1 is found S2: If 0 is found S3: If 0 is found Encoding: S0: 00 S1: 01 S2: 11 S3: 10 Transition: Actual state / Input / Next state 00 - 0 - 00 00 - 1 - 01 01 - 0 - 11 01 - 1 - 01 11 - 0 - 10 11 - 1 - 01 10 - 0 - 00 10 - 1 - 01 T...

    €20 (Avg Bid)
    €20 Keskimäär. tarjous
    21 tarjoukset

    Handson training required on Xilinx Zc-702 including device programming in vhdl and its interfacing with perepherels like ADC, DAC, Memory etc.

    €9 (Avg Bid)
    €9 Keskimäär. tarjous
    2 tarjoukset

    I have problem in "fpga" I can't how to interface between power stage card and "fpga" card Can you write program in "vhdl" language?

    €18 (Avg Bid)
    €18 Keskimäär. tarjous
    8 tarjoukset

    To Teach : About VLSI Advanced Digital System Design VHDL Verilog RTL Design FPGA Design SystemVerilog VMM Methodology OVM Methodology UVM Methodology

    €95 (Avg Bid)
    €95 Keskimäär. tarjous
    5 tarjoukset
    FPGA Development Loppunut left

    More than 2 years of experience in FPGA design and development area. Candidate should have working Industry experience in below skill set:- •Working experience to process received frequency chirplet data using FPGA and to transmit processed data by interfacing FPGA with Radio Frequency (RF) transceiver module ADRV9009 and 10 Gigabit Ethernet Media Access Controller (10GEMAC). •Working ...

    €820 (Avg Bid)
    €820 Keskimäär. tarjous
    10 tarjoukset

    Needs to hire 3 Freelancers We are a small and growing company offering consulting and engineering services in many different areas of industry. Here you can find more about us: [kirjaudu nähdäksesi URL:n] In order to enforce our team, we are seeking embedded systems designers with experience in the following domains: * PCB design (Altium Designer, Eagle, KiCAD, PCAD...) * Firmware desi...

    €508 (Avg Bid)
    €508 Keskimäär. tarjous
    67 tarjoukset