Verilog project työt

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    2,120 verilog project työtä löytyi, hinnoittelu EUR
    Verilog Project 8 päivää left

    Hi Widana Kankanamge T., I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    €22 (Avg Bid)
    €22 Keskimäär. tarjous
    1 tarjoukset

    we want a efficient 8-point fft verilog code which can be synthesized and connected to AXI-4 bus which can act as an hardware accelerator to the existing risc-v.

    €94 (Avg Bid)
    €94 Keskimäär. tarjous
    1 tarjoukset

    Image processing on FPGA using [kirjaudu nähdäksesi URL:n] a image and do threshold operation like this

    €56 (Avg Bid)
    €56 Keskimäär. tarjous
    3 tarjoukset

    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7. Design: I2C Master <-> FSM <-> UART

    €17 (Avg Bid)
    €17 Keskimäär. tarjous
    2 tarjoukset

    I have a module I need to add uncertanity to it to see its output

    €35 (Avg Bid)
    €35 Keskimäär. tarjous
    5 tarjoukset

    I need a working code in Verilog that is able to successfully simulate, synthesize and generate bitstream on Xilinx Vivado for FPGA. The code should be able to implement a Convolutional Neural Network and take as input weights and biases from a pretrained model in Python and then use them to identify the 28x28 pixel test image from a MNIST database. Whatever digit is identified by the code, releva...

    €241 (Avg Bid)
    €241 Keskimäär. tarjous
    11 tarjoukset

    Hi! I want to deploy a custom RISC-V processor on FPGA. There are two tasks: 1. Deploy the core to run C codes on it and blink an LED (the core is implemented in Verilog and synthesizable). 2. Boot Linux Kernel (files are ready). I want to deploy the processors on the ZCU102 Zynq MPSoC Board (Zynq UltraScale) FPGA.

    €393 (Avg Bid)
    €393 Keskimäär. tarjous
    7 tarjoukset

    I need someone fix verilog code and run it in nexys 2

    €19 (Avg Bid)
    €19 Keskimäär. tarjous
    3 tarjoukset

    I need someone who can fix verilog code and run it in nexys 2

    €31 (Avg Bid)
    €31 Keskimäär. tarjous
    4 tarjoukset

    Description Proposing and computer implementation of a heuristic program supporting the process of formal verification of digital circuit models using the constraints programming method. You should propose and implement an algorithm, and then test it on a set of selected hardware models in VHDL, Verilog or SystemC. Required knowledge of modern digital and microprocessor systems, ease of creating a...

    €60 (Avg Bid)
    €60 Keskimäär. tarjous
    1 tarjoukset

    Can you fix a verilog project and run it in nexys 2 and write report about it

    €8 (Avg Bid)
    €8 Keskimäär. tarjous
    1 tarjoukset

    I need someone who can fix verilog code and run it in nexys 2

    €15 (Avg Bid)
    €15 Keskimäär. tarjous
    3 tarjoukset

    I am looking for someone who can design FPGA mining bitstreams . I'm looking for someone who can work with me long term . This is a very serious project. Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing two BCUs) would be highest prio...

    €1061 (Avg Bid)
    €1061 Keskimäär. tarjous
    4 tarjoukset

    Make a binary adder that has a dividend of 8 bits, divisor of 4 bits, quotient of 4 bits and remainder of 4 bits. Must be long division by subtracting and shifting. Must also have a testbench that outputs the results asked for in the .pdf file.

    €20 (Avg Bid)
    €20 Keskimäär. tarjous
    10 tarjoukset

    I need the help of someone who could help me propose and implement an algorithm using constraints programming methods that supports formal verification of digital models that can be used on hardware models in c Precisely or VHDl,verilog, e.t.c, and also i will need a report proposal on this to get it approved its quite urgent please, your help would be highly appreciated

    €42 (Avg Bid)
    €42 Keskimäär. tarjous
    5 tarjoukset
    logic design -- 2 5 tuntia left

    I need someone who is really good and fast in writing Verilog HDL module similar to the attached file tasks and submit the work back to me in less than 2 hours. I need the project to be completed on Tuesday 4 May 2021. The project will start exactly at 1:30 pm and I need it submitted back to me by 3:00 pm Saudi Arabia timing. I hope you have the time and agree to do my project hope to hear from yo...

    €33 (Avg Bid)
    €33 Keskimäär. tarjous
    1 tarjoukset
    Logic Design Loppunut left

    I need someone who is really good and fast in writing Verilog HDL module similar to the attached file tasks and submit the work back to me in less than 2 hours. I need the project to be completed on Tuesday 4 May 2021. The project will start exactly at 1:30 pm and I need it submitted back to me by 3:00 pm Saudi Arabia timing.

    €54 (Avg Bid)
    €54 Keskimäär. tarjous
    5 tarjoukset

    Looking for an experienced fpga engineer to help me get going with Verilog and just basic fpga planning, resource allocation , memory controllers, ip use. Multiple sessions [Removed by Freelancer.com Admin for offsiting - please see Section 13 of our Terms and Conditions] maybe 3 times a week 1 hour per session

    €16 / hr (Avg Bid)
    €16 / hr Keskimäär. tarjous
    6 tarjoukset

    I need Verilog Expert for explanation of a small task. further detail in inbx

    €10 (Avg Bid)
    €10 Keskimäär. tarjous
    10 tarjoukset

    Hi, I have an accelerometer (I2C) and I want to read it and print the output on the terminal through UART. The code must be written in Verilog or SystemVerilog targeting Xilinx FPGAs. It will be tested in a Digilent Cmod A7.

    €41 (Avg Bid)
    €41 Keskimäär. tarjous
    6 tarjoukset

    debuging existed code in verilog, just help me to edit tiny part

    €27 (Avg Bid)
    €27 Keskimäär. tarjous
    8 tarjoukset

    My project is verification of i2c master core using system verilog

    €31 (Avg Bid)
    €31 Keskimäär. tarjous
    2 tarjoukset

    My project is verification of i2c master core using system verilog

    €7 - €17
    €7 - €17
    0 tarjoukset

    Verilog Project, can send more details

    €68 (Avg Bid)
    €68 Keskimäär. tarjous
    1 tarjoukset

    There are a few algorithms of modular multiplication to be implemented in Verilog and compare their results such as delays, hardware consumed, and speed of implementation etc.....

    €356 (Avg Bid)
    €356 Keskimäär. tarjous
    12 tarjoukset
    Verilog Project Loppunut left

    I need someone to code a verilog project for me. I have specifications for the project and more details will be sent through messaging. Thank you.

    €22 (Avg Bid)
    €22 Keskimäär. tarjous
    10 tarjoukset
    €122 Keskimäär. tarjous
    16 tarjoukset

    Hi I am looking for Verilog Coding expert for a task. I will share more details through chat.

    €18 (Avg Bid)
    €18 Keskimäär. tarjous
    4 tarjoukset

    This project is more on the Switching and Logic Theory. I will need a thorough State Diagram, State Tables, Optimized State Assignments and the Output and Next-State Equations including a Block Diagram. Once, this is finished, a Verilog code will need to be included.

    €137 (Avg Bid)
    €137 Keskimäär. tarjous
    7 tarjoukset

    Modules and simulation files are needed in vivado verilog

    €70 (Avg Bid)
    €70 Keskimäär. tarjous
    7 tarjoukset

    The project is done using Intel Quartus Prime 18.1 software and using verilog code. The design will be based on two 8-bit input, and output will be 16-bit unsigned numbers. The performance of the design will be compared to the array of ripple design. i have done the array multiplier verilog coding but i dont know how to do the pipeline coding for the array multiplier.

    €96 (Avg Bid)
    €96 Keskimäär. tarjous
    3 tarjoukset
    verilog project Loppunut left

    I need help for you my verilog project.

    €16 (Avg Bid)
    €16 Keskimäär. tarjous
    4 tarjoukset
    €23 Keskimäär. tarjous
    12 tarjoukset

    Hi I am looking for System Verilog Coding expert for a task. I will share more details through chat.

    €21 (Avg Bid)
    €21 Keskimäär. tarjous
    5 tarjoukset

    I have matlab code with me, to convert it into verilog for FPGA

    €28 (Avg Bid)
    €28 Keskimäär. tarjous
    3 tarjoukset
    verilog code Loppunut left

    Had a code in MATLAB, to be converted in verilog

    €129 (Avg Bid)
    €129 Keskimäär. tarjous
    7 tarjoukset

    8 input fft verilog code and video demonstration in vivado

    €21 (Avg Bid)
    €21 Keskimäär. tarjous
    1 tarjoukset
    Verilog Project Loppunut left

    Need help for my Verilog Project

    €10 (Avg Bid)
    €10 Keskimäär. tarjous
    5 tarjoukset

    Hi I am looking for System Verilog Coding expert for a task. I will share more details through chat.

    €42 (Avg Bid)
    €42 Keskimäär. tarjous
    3 tarjoukset
    System Verilog Task Loppunut left

    Hi I am looking for System Verilog Coding expert for a task. I will share more details through chat.

    €12 (Avg Bid)
    €12 Keskimäär. tarjous
    1 tarjoukset

    Hi I am looking for Verilog Coding expert for a task. I will share more details through chat.

    €14 (Avg Bid)
    €14 Keskimäär. tarjous
    4 tarjoukset

    have been struggling with this lab for a long time, very hard for me, need assistance, related file is provided

    €113 (Avg Bid)
    Kiireellinen
    €113 Keskimäär. tarjous
    2 tarjoukset

    1. Need a verilog code for a project 2. Need a brief explanation of the code and demonstration

    €12 (Avg Bid)
    €12 Keskimäär. tarjous
    1 tarjoukset

    i want long term employee. need to prepare report also. if you are expert in verilog, vhdl. please bid here

    €37 (Avg Bid)
    €37 Keskimäär. tarjous
    5 tarjoukset

    i want long term employee. if you are expert in verilog, vhdl. please bid here

    €4 / hr (Avg Bid)
    €4 / hr Keskimäär. tarjous
    1 tarjoukset

    I need someone very good in verilog. I will share more details on chat.

    €26 / hr (Avg Bid)
    €26 / hr Keskimäär. tarjous
    7 tarjoukset

    [kirjaudu nähdäksesi URL:n] using verilog in vivado 2. 8 Input 3. Real time input 4. Should reduce power and area consumption

    €79 (Avg Bid)
    €79 Keskimäär. tarjous
    1 tarjoukset

    Hi Mohamed Sheriff M., I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    €54 (Avg Bid)
    €54 Keskimäär. tarjous
    1 tarjoukset
    digital design Loppunut left

    Design an FSM that has an input X and an output Y . Whenever X changes from 0 to 1, Y should become 1 for two clock cycles and then return to 0 – even if X is still 1. 2. Design an FSM with no inputs and three outputs x, y, and z. The bit sequence x yz should always cycle through the following value: 000, 001, 010, 100, (repeat) I only need to write one Verilog file containing both the modu...

    €25 (Avg Bid)
    €25 Keskimäär. tarjous
    2 tarjoukset

    debuging existed code in verilog

    €101 (Avg Bid)
    €101 Keskimäär. tarjous
    9 tarjoukset